3.6 Timer TMR2
Timer TMR2 module is an 8-bit timer which operates in a very specific way.
Pulses from the quartz oscillator first pass through the prescaler the rate of which may be changed by combining the T2CKPS1 and T2CKPS0 bits. The output of the prescaler is then used to increment the TMR2 register starting from 00h. The values of TMR2 and PR2 are constantly compared and the TMR2 register keeps on being incremented until it matches the value in PR2. When the match occurs, the TMR2 register is automatically cleared to 00h. The timer TMR2 postscaler is incremented and its output is used to generate an interrupt if it is enabled.
The TMR2 and PR2 registers are both fully readable and writable. Counting may be stopped by clearing the TMR2ON bit, which results in power saving.
The moment of TMR2 reset may also be used to determine the baud rate of synchronous serial communication.
The timer TMR2 is controlled by several bits of the T2CON register.
T2CON Register
TOUTPS3 - TOUTPS0 - Timer2 Output Postcaler Select bits are used to determine the postscaler rate according to the following table:
| TOUTPS3 |
TOUTPS2 |
TOUTPS1 |
TOUTPS0 |
POSTSCALER RATE |
| 0 |
0 |
0 |
0 |
1:1 |
| 0 |
0 |
0 |
1 |
1:2 |
| 0 |
0 |
1 |
0 |
1:3 |
| 0 |
0 |
1 |
1 |
1:4 |
| 0 |
1 |
0 |
0 |
1:5 |
| 0 |
1 |
0 |
1 |
1:6 |
| 0 |
1 |
1 |
0 |
1:7 |
| 0 |
1 |
1 |
1 |
1:8 |
| 1 |
0 |
0 |
0 |
1:9 |
| 1 |
0 |
0 |
1 |
1:10 |
| 1 |
0 |
1 |
0 |
1:11 |
| 1 |
0 |
1 |
1 |
1:12 |
| 1 |
1 |
0 |
0 |
1:13 |
| 1 |
1 |
0 |
1 |
1:14 |
| 1 |
1 |
1 |
0 |
1:15 |
| 1 |
1 |
1 |
1 |
1:16 |
TMR2ON - Timer2 On bit turns the timer TMR2 on.
- 1 - Timer TMR2 is on.
- 0 - Timer TMR2 is off.
T2CKPS1, T2CKPS0 - Timer2 Clock Prescale bits determine the prescaler rate:
| T2CKPS1 |
T2CKPS0 |
PRESCALER RATE |
| 0 |
0 |
1:1 |
| 0 |
1 |
1:4 |
| 1 |
x |
1:16 |
In Short
When using the TMR2 timer, you should know several specific details related to its registers:
- At the moment of powering on, the PR2 register contains the value FFh.
- Both prescaler and postscaler are cleared by writing to the TMR2 register.
- Both prescaler and postscaler are cleared by writing to the T2CON register.
- On any reset - you guess, both prescaler and postscaler are cleared.
CCP modules can operate in many different modes, which makes them the most complicated to deal with. Just try to analyze their operation on the basis of the tables describing bit functions and you will understand what we are talking about. So, if you use some of the CCP module, first select the mode you need, analyze the appropriate figure and then change bits of the registers. Or else...
