input-capture-operation-in-sleep-and-idle-modes

5.3 Input capture operation in SLEEP and IDLE modes

Input capture operation in SLEEP mode – In SLEEP mode, the system clock is disabled, i.e. the input capture module can only function as an external interrupt source. This mode is enabled by setting control bits ICM<2:0> to 111. A rising edge on the ICx input pin will generate an input capture module interrupt. If the interrupt is enabled for this input pin, the microcontroller will wake-up from SLEEP.

In the event the input capture module has been configured for a mode other than ICM<2:0>=111 and the microcontroller enters the SLEEP mode, no external signal, rising or falling, can generate a wake-up condition from SLEEP. Input capture operation in IDLE mode – Operation of the input capture module in IDLE mode is specified by the control bit ICSIDL (ICxCON<13>). If ICSIDL= 0, the module will continue operation in IDLE mode with full functionality in all the above mentioned modes. The prescaler is fully functional in this mode. If ICSIDL=1, the module will stop in IDLE mode. Then, the input capture module can operate only in the external signal interrupt mode, i.e. the control bits ICM<2:0>=111. A rising edge on the ICx input pin will generate an input capture module interrupt. If the interrupt is enabled for this input pin, the microcontroller will wake-up from IDLE state. In the event the input capture module has been configured for a different mode and the microcontroller enters the IDLE mode with the control bit ICSIDL is set, no external signal, rising or falling, can generate a wake-up condition from IDLE state.

Attention! When the input capture module is enabled, a user software has to enable that the ICx input pin is configured as the input pin by setting the associated TRIS bit. By enabling the input capture module the pin ICx is not configured automatically. Also, all other peripherals using this pin have to be disabled.

pic-microcontrollers-programming-dspic-in-pascal-chapter-05-image-3a

Fig. 5-3a Pin diagram of dsPIC30F4013

pic-microcontrollers-programming-dspic-in-pascal-chapter-05-image-3b

Fig. 5-3b Pin diagram of dsPIC30F6014A

Finally, a description of the registers of the input capture module of microcontroller dsPIC30F4013 is presented.

NAME	ADR	15	14	13	12-8	7	6	4	3	2	RESET STATE
IC1BUF	0x0140	Input 1 Capture Buffer Register									0xuuuu
IC1CON	0x0142	-	-	ICSIDL	-	ICTMR	ICI<1:0>	ICOV	ICBNE	ICM<2:0>	0x0000
IC2BUF	0x0144	Input 2 Capture Buffer Register									0xuuuu
IC2CON	0x0146	-	-	ICSIDL	-	ICTMR	ICI<1:0>	ICOV	ICBNE	ICM<2:0>	0x0000
IC7BUF	0x0158	Input 7 Capture Buffer Register									0xuuuu
IC7CON	0x015A	-	-	ICSIDL	-	ICTMR	ICI<1:0>	ICOV	ICBNE	ICM<2:0>	0x0000
IC8BUF	0x015C	Input 8 Capture Buffer Register									0xuuuu
IC8CON	0x015E	-	-	ICSIDL	-	ICTMR	ICI<1:0>	ICOV	ICBNE	ICM<2:0>	0x0000

Table 5-1 Input capture module registers

ICSIDL – Input captur module stop in IDLE control bit 
        (ICSIDL=0 input capture module will continue to operate in IDLE mode, 
        ICSIDL=1 input capture module will halt in IDLE mode)
        
ICTMR – Input capture timer select bits (ICTMR=0 TMR3 contents are captured on capture event, 
        ICTMR=1 TMR2 contents are captured on capture event)

ICI <1:0> - Select number of captures per interrupt bits
      00 – interrupt on every capture event
      01 – interrupt on every second capture event
      10 – interrupt on every third capture event
      11 – interrupt on every fourth capture event
    
ICOV – FIFO buffer overflow status flag (read only) bit

ICBNE – FIFO buffer buffer empty status (read only) bit 
        (ICBNE=0 FIFO buffer empty, ICBNE=1 FIFO buffer contains at least one capture value
  
ICM <2:0> - Input capture mode select bits
      000 – Input capture module turned off
      001 – Capture mode, every edge (rising or falling)
      010 – Capture mode, every falling edge
      011 – Capture mode, every rising edge
      100 – Capture mode, every 4th rising edge
      101 – Capture mode, every 16th rising edge  
      110 – Unused (module disabled)
      111 – Input capture module in external signal interrupt mode 
      (external source of interrupt requests)